VeriSIM (Verifying designs by SIMulating scenarios) is a web-based self-learning learning environment that helps learners develop an integrated understanding of software design diagrams. In VeriSIM, learners are first introduced to the requirements and design diagrams for an ‘‘Automated Door Locking System’’. They then trace scenarios in the design using the "design tracing" pedagogy. Finally, they reflect on their overall learning and how it will be useful for them in the future. In VeriSIM, these activities are presented as various challenges to learners.